Without limiting the scope of the invention, this background of the invention is described in connection with microprocessor resource allocators, as an example. Modern microprocessors are designed to simultaneously issue and execute several instructions in a single clock cycle using a variety of techniques, such as pipelining, dynamic scheduling, speculative execution and out of order execution. Each technique for improving total instruction throughput generally relies on additional hardware structures such as load buffers, store buffers, and reorder buffers. One or more reorder buffers may be present in a modern processor, facilitating speculative execution and out of order execution, and providing additional resources to issued instructions.
A number of resource identifiers and tags are used in modern processing devices to manage the various processor resources, correctly identify and enforce data dependencies and to keep track of the instructions that are issued and completed. Where the hardware structures are buffers, such as the reorder buffer, hardware identifiers are utilized to allocate new buffer entries and tags, to identify and match existing entries, and to replace tags with values. A number of resource identifiers are generally associated with a single hardware structure and together, the group of identifiers forms a sequence. Each resource identifiers in the sequence identifies an element of the associated hardware structure and allocates the element to issued instructions. Thus, the resource identifiers are associated with instructions and are allocated in sequence order using a resource allocator.
A resource allocator may generate and allocate resource identifiers in numeric order by using adders to generate the next identifier in numeric sequence or by storing the sequence and indexing resource identifiers within the stored sequence after determining which identifier had been most recently allocated. Because the resource allocator is in the critical path of the decoder stage of most modern microprocessors, it is desirable to minimize the speed with which identifiers are generated and resources are allocated.
Accordingly, it would be desirable to increase resource allocation efficiency within an advanced microprocessor. It would be advantageous to decrease the number of logic levels necessary to generate and allocate resource identifiers. It would further be beneficial to generate and allocate resource identifiers using a nonnumeric sequence.